Moore’s Law and Transistors
Peter Dunn
FACSNET High Tech Adviser
Posted: Sept. 12, 2000;
The fundamental measure of a wafer fab is the minimum feature size it is capable of producing on a wafer. Smaller is better, because this allows more transistors and other components to be packed onto a chip of a given size, and also provides performance benefits.
Back in the early days of chipmaking, feature sizes were in the 12 micron (1200 nanometer) range. This progressed to 10 microns (1000 nanometer) by the start of the 1970s, and continued along the lines shown in the accompanying table of Intel processor chips. It should be noted that as feature size decreased, the overall size of the chip was increasing – this allowed for even more circuitry to be placed on each one, but also forced chipmakers to start moving to larger wafers. The accompanying diagram shows how Intel’s microprocessors have grown over the years, even as the features on them have shrunk.
|
|
|
|
|
|
1971 |
4004 |
2300 |
10 micron |
|
1972 |
8008 |
3500 |
10 micron |
|
1974 |
8080 |
6000 |
6 micron |
|
1976 |
8085 |
6500 |
3 micron |
|
1978 |
8086 |
29000 |
3 micron |
|
1982 |
80286 |
134,000 |
1.5 micron |
|
1985 |
80386 |
275,000 |
1.5 micron |
|
1989 |
Intel486 |
1.2 million |
1 micron |
|
1993 |
Pentium |
3.1 million |
800 nanometer |
|
1997 |
Pentium II |
7.5 million |
350 nanometer |
| 1999 (Feb.) |
Pentium III |
9.5 million |
250 nanometer |
| 1999 (Oct.) |
Pentium III |
28 million |
180 nanometer |
| Source: Intel | |||
In the mid-1960s, semiconductor pioneer and Intel co-founder Gordon Moore noticed that, largely as a result of feature size shrinkage, chip power was roughly doubling every 18 months, with a concurrent reduction in cost. He extrapolated this trend in what proved to be a remarkably accurate estimate of semiconductor industry progress. The so-called “Moore’s Law” curve of industry progress is one of the standards of the chipmaking world, and is constantly cited by industry executives as they describe their strategic plans (indeed, it’s rare to attend a conference without seeing many presentation slides mentioning the phenomenon!).
THE PHYSICAL SIZE (aka "die size") of Intel's line of microprocessors, from the 2300-transistor 4004 of the early 1970s to the recent Pentium II, which carries 7.5 million transistors. The die size is generally a function of the number of transistors on the chip (which has increased by several orders of magnitude) and the minimum size of the features forming each transistor (which has shrunk from 10 microns on the 4004 to 0.35 micron, or 350 nanometers, on the Pentium II). Image courtesy Intel Corp.
While Moore’s Law has accurately described the overall trend, there have been periods of faster and slower progress, often associated with major industry upturns or downturns. In the early 1990s, in an effort to help companies plan and coordinate their research and development efforts, and to ensure continued progress for the industry as a whole, U.S.-based chipmakers put aside often-bitter rivalries and joined forces to create a “technology roadmap” that outlined a consensus view of how technology would advance in coming years and identified potential trouble spots where additional research was needed.
This ambitious document proved to be a popular source of common data and outlook, and it has been revised several times since, most recently in 1999. The 1999 version was a global undertaking, with companies from Japan, Taiwan, South Korea, and several European nations cooperating on the project. The Roadmap is constantly referred to in the semiconductor industry, and is a large and valuable source of data for the journalist. One of the most interesting aspects of the Roadmap is its identification of Grand Challenges – broad problem areas that could affect continued progress in chip technology. Also called out are more specific difficulties that must be met in various chipmaking processes. The document also provides a wealth of data on how process technology will evolve over the next 15 years.
Roadmapping of technology development is difficult at best, since the path and pace of innovation are dictated by unpredictable market forces and research breakthroughs. Since the mid-1990s, progress has been faster than usual, with a new generation of technology coming into production about every two years, compared to the long-term average of every three years, and editions of the Roadmap have been somewhat too conservative in their forecasts. (It could be argued that the existence of the Roadmap has itself caused progress to accelerate, as companies try to leap ahead of their rivals).
While the definition of what constitutes a “generation” varies somewhat from company to company, the International Technology Roadmap for Semiconductors has identified a series of “technology nodes” and their expected arrival dates, which, after substantial debate within the industry, reflect a three-year schedule. Some chip companies, notably Intel, had called for the document to reflect two-year cycles; it remains to be seen what pace will emerge in the real world. The roadmapping trend has also spread to other electronics-related industries, such flat-panel displays, board-level manufacturing, and micro-electromechanical systems (MEMS).
A Sense of Scale
Peter Dunn
FACSNET High Tech Adviser
Posted: Sept. 27, 2000;
When you're learning about semiconductors, one of the toughest things is getting an understanding of the scale involved. A typical advanced chip, the size of a thumbnail or less, can contain more than 10 million transistors, or storage for more than 128 million bits of data. The features on these chips are so small, the materials so pure, that it seems impossible.
An example: the most modern silicon wafers, on which semiconductors are produced, are 300mm (about 12 inches) in diameter. They are pure silicon, to one part per billion. To get a sense of this, imagine taking small white breath mints (like Tic-Tacs) and laying them side by side, five to an inch, all the way from New York to San Francisco. One part per billion is the equivalent of a single red Tic-Tac in that otherwise all-white transcontinental line.
A measurement: These 300mm wafers are flat within 130 nanometers (130 billionths of a meter). If you imagine the wafer expanded to the size of North America, this would mean a total flatness variation of about 7 feet in 3000 miles, between New York and San Francisco, or Hudson's Bay and Mexico City.
An anecdote: at many points during the chipmaking process, the silicon wafer is coated with a photosensitive chemical, much like the emulsion on photographic film, so that circuit features can be printed onto the wafer. This chemical, known as a photoresist, must be extremely pure -- even a tiny particle can produce a "killer defect" that can ruin a chip. But these particles are about the same size as the molecules of some ingredients in the photoresist. If the chemical is run through a filter fine enough to remove the particles, it also filters out some of the resist's ingredients. This is the kind of problem you face when working near the atomic scale -- and is just one aspect of making one chemical for one of the hundreds of processes used to make a chip.
To approach the question another way, let's look at the most basic measure of a chip's sophistication: minimum feature size.
Chips are generally categorized by their "minimum feature size" -- the dimension of the smallest feature actually constructed in the manufacturing process. This size is continually getting smaller, as chipmakers seek to pack more circuitry into the same space (beyond today's upper limit of 20 million to 30 million transistors).
As of early 2000, the most advanced chips in production have minimum feature sizes of about 180 nanometers, or 180 billionths of a meter. (You will also hear people in the electronics industry talk in terms of "microns," a unit of measure equal to 1000 nanometers, or one millionth of a meter. This has been the standard unit for many years, but it is now being supplanted by nanometers as dimensions shrink to small fractions of a micron. The 180 nanometer feature would also be 0.18 micron.) By 2001, chips with 150 nanometer features will be in production, and 130 nanometer devices will follow by 2002, according to an industry-wide consensus forecast.
It's difficult to relate a dimension like a 150 nanometers to the real world, since there's nothing familiar that's anywhere near that small. One commonly used reference is the typical human hair, which is somewhere between 60,000 and 100,000 nanometers across, or roughly 500 times as wide as a 150 nanometer feature.
It might be easier to approach the scale question from the other direction -- the atomic level.
Looking at the other end of the distance spectrum might be more illustrative of just how small these things are: in a piece of silicon, the individual atoms, the fundamental building blocks of the physical world, are spaced about 0.235 nanometers apart, so our 150 nanometer feature would be spanned by a piece of silicon roughly 638 silicon atoms across.
Things get even hairier when we consider a portion of the chip called the gate dielectric, the insulating layer that sits atop the gate area of a transistor, separating it from the gate electrode above. It must be just thin enough to allow a small amount of current to leak from the electrode to the gate area and change the behavior of the gate from conductor to insulator or vice-versa. The gate insulator's thickness in a state-of-the-art chip is about 8 nanometers, or roughly 25 atomic layers of silicon oxide, the traditional insulating material on a chip.
These achievements are perfect examples of technology's ability to build onto and extend previous efforts -- if one were to start at ground zero they would be unimaginable. But for more than 40 years, chipmakers have been refining their art and pushing towards ever-smaller feature sizes to reduce cost and to boost power. They have conquered or side-stepped innumerable problems along the way, and continue to do so. As chip dimensions approach finite numbers of atoms, some observers have suggested that progress will have to cease.
While there is a limit to everything, the profits to be made by extending current technology are immense. Huge financial and intellectual resources from all parts of the industrialized world are being brought to bear on the situation, and it seems likely that feature sizes will continue to shrink for at least the next decade (although a great deal of research is under way and conditions could change suddenly).
After that, however, things get murky, and it may be that the traditional semiconductor model will run out of gas and possibly be replaced by an as-yet undetermined technology.