NYT

Intel Says Chips Will Run Faster, Using Less Power

By JOHN MARKOFF
Published: January 27, 2007
Intel, the world’s largest chip maker, has overhauled the basic building block of the information age, paving the way for a new generation of faster and more energy-efficient processors.

Mark Bohr, an Intel physicist who led the research, holds a 45-nanometer wafer using new metal alloys that led the insulation advance.

Company researchers said the advance represented the most significant change in the materials used to manufacture silicon chips since Intel pioneered the modern integrated-circuit transistor more than four decades ago.

The microprocessor chips, which Intel plans to begin making in the second half of this year, are designed for computers but they could also have applications in consumer devices. Their combination of processing power and energy efficiency could make it possible, for example, for cellphones to play video at length — a demanding digital task — with less battery drain.

The work by Intel overcomes a potentially crippling technical obstacle that has arisen as a transistor’s tiny switches are made ever smaller: their tendency to leak current as the insulating material gets thinner. The Intel advance uses new metallic alloys in the insulation itself and in adjacent components.

Word of the announcement, which is planned for Monday, touched off a war of dueling statements as I.B.M. rushed to announce that it was on the verge of a similar advance.

I.B.M. executives said their company was planning to introduce a comparable type of transistor in the first quarter of 2008.

Many industry analysts say that Intel retains a six-month to nine-month lead over the rest of the industry, but I.B.M. executives disputed the claim and said the two companies were focused on different markets in the computing industry.

The I.B.M. technology has been developed in partnership with Advanced Micro Devices, Intel’s main rival. Modern microprocessor and memory chips are created from an interconnected fabric of hundreds of millions and even billions of the tiny switches that process the ones and zeros that are the foundation of digital computing.

They are made using a manufacturing process that has been constantly improving for more than four decades. Today transistors, for example, are made with systems that can create wires and other features that are finer than the resolving power of a single wavelength of light.

The Intel announcement is new evidence that the chip maker is maintaining the pace of Moore’s Law, the technology axiom that states that the number of transistors on a chip doubles roughly every two years, giving rise to a constant escalation of computing power at lower costs.

“This is evolutionary as opposed to revolutionary, but it will generate a big sigh of relief,” said Vivek Subramanian, associate professor of electrical engineering and computer sciences at the University of California, Berkeley.

For several decades there have been repeated warnings about the impending end of the Moore’s Law pace for chip makers. In response the semiconductor industry has repeatedly found its way around fundamental technical obstacles, inventing techniques that at times seem to defy basic laws of physics.

The chip industry measures its progress by manufacturing standards defined by a width of one of the smallest features of a transistor for each generation. Currently much of the industry is building chips in what is known as 90-nanometer technology. At that scale, about 1,000 transistors would fit in the width of a human hair. Intel began making chips at 65 nanometers in 2005, about nine months before its closest competitors.

Now the company is moving on to the next stage of refinement, defined by a minimum feature size of 45 nanometers. Other researchers have recently reported progress on molecular computing technologies that could reduce the scale even further by the end of the decade.

Intel’s imminent advance to 45 nanometers will have a huge impact on the industry, Mr. Subramanian said. “People have been working on it for over a decade, and this is tremendously significant that Intel has made it work,” he said.

Intel’s advance was in part in finding a new insulator composed of an alloy of hafnium, a metallic element that has previously been used in filaments and electrodes and as a neutron absorber in nuclear power plants. They will replace the use of silicon dioxide — essentially the material that window glass is made of, but only several atoms thick.

Intel is also shifting to new metallic alloy materials — it is not identifying them specifically — in transistor components known as gates, which sit directly on top of the insulator. These are ordinarily made from a particular form of silicon called polysilicon.

The new approach to insulation appears at least temporarily to conquer one of the most significant obstacles confronting the semiconductor industry: the tendency of tiny switches to leak electricity as they are reduced in size. The leakage makes chips run hotter and consume more power.

Many executives in the industry say that Intel is still recovering from a strategic wrong turn it made when the company pushed its chips to extremely high clock speeds — the ability of a processor to calculate more quickly. That obsession with speed at any cost left the company behind its competitors in shifting to low-power alternatives.

Now Intel is coming back. Although the chip maker led in the speed race for many years, the company has in recent years shifted its focus to low-power microprocessors that gain speed by breaking up each chip into multiple computing “cores.” In its new 45-nanometer generation, Intel will gain the freedom to seek either higher performance or substantially lower power, while at the same time increasing the number of cores per chip.

“They can adjust the transistor for high performance or low power,” said David Lammers, director of WeSRCH.com, a Web portal for technical professionals.

The Intel development effort has gone on in a vast automated factory in Beaverton, Ore., that the company calls D1D. It features huge open manufacturing rooms that are kept surgically clean to prevent dust from contaminating the silicon wafers that are whisked around the factory by a robotic conveyor system.

The technology effort was led by Mark T. Bohr, a longtime Intel physicist who is director of process architecture and integration. The breakthrough, he said, was in finding a way to deal with the leakage of current. “Up until five years ago, leakage was thought to increase with each generation,” he said.

Several analysts said that the technology advance could give Intel a meaningful advantage over competitors in the race to build ever more powerful microprocessors.

“It’s going to be a nightmare for Intel’s competitors,” said G. Dan Hutcheson, chief executive of VLSI Research. “A lot of Mark Bohr’s counterparts are going to wake up in terror.”

An I.B.M. executive said yesterday that the company had also chosen hafnium as its primary insulator, but that it would not release details of its new process until technical papers are presented at coming conferences.

“It’s the difference between can openers and Ferraris,” said Bernard S. Meyerson, vice president and chief technologist for the systems and technology group at I.B.M. He insisted that industry analysts who have asserted that Intel has a technology lead are not accurate and that I.B.M. had simply chosen to deploy its new process in chips that are part of high-performance systems aimed at the high end of the computer industry.

Intel said it had already manufactured prototype microprocessor chips in the new 45-nanometer process that run on three major operating systems: Windows, Mac OS X and Linux.

Meet the World's First 45nm Transistors
Intel® 45nm Transistor Technology


Biggest Change to Computer Chips in 40 Years Means More Performance for Exponentially Less Cost
In one of the biggest advancements in fundamental transistor design, Intel will use dramatically different transistor materials to build the hundreds of millions of microscopic 45 nanometer (nm) transistors inside the next generation of the company's Intel® Core™2 family of processors. Intel already has the world's first 45nm CPUs in-house - the first of at least fifteen 45nm processor products in development. This new transistor breakthrough will allow Intel to continue delivering record-breaking PC, laptop and server processor speeds while reducing the amount of electrical leakage from transistors that can hamper chip and PC design, size, power consumption, noise and costs. It also ensures that Moore's Law, a high-tech industry axiom that transistor counts double about every two years to deliver ever more functionality at exponentially decreasing cost, thrives well into the next decade.

By using a new material combination of high-k gate dielectrics and metal gates, Intel's 45nm transistors significantly improve performance to deliver faster multi-core processors that consume less power. Intel's demonstration of a functional 45nm CPU underscores its process technology lead of more than a year over the rest of the semiconductor industry. The world's first working 45nm processors (next generation Intel® Core™2 family processors - codenamed "Penryn") are already running multiple operating systems (Windows* Vista*, Mac OS X*, Windows* XP and Linux*) and various applications. Intel is on track for 45nm production in the second half of 2007.


Record-Setting High-Performance Transistors
According to Intel co-founder Gordon Moore, "The implementation of high-k and metal materials marks the biggest change in transistor technology since the introduction of polysilicon gate MOS transistors in the late 1960s."

Compared to today's 65nm technology, Intel's 45nm technology will provide the following product benefits:

Approximately twice the transistor density (great for smaller chip sizes or increased transistor counts)
Approximately 30 percent reduction in transistor-switching power
Greater than 20 percent improvement in transistor-switching speed or a greater than 5 times reduction in source-drain leakage power
Greater than 10 times reduction in transistor gate oxide leakage for lower power requirements and increased battery life

Fun facts about 45-nm transistors
Hundreds could fit on the surface of a single red blood cell
2,000 fit across a human hair
30,000 fit on the head of a pin
It can switch on and off approximately 300 billion times a second


Solving a Major Impasse in Transistor Miniaturization
To understand the full significance of Intel's achievement, it helps to know that transistors are the tiny switches that process the ones and zeroes of the digital world. A gate is used to turn transistors on and off, and the gate dielectric is an insulator underneath the gate. The gate dielectric's job is to separate (insulate) the gate from the channel where the current flows.

Intel's innovative combination of the metal gates and the high-k gate dielectrics represents a major milestone as the industry races to reduce electrical current leakage in transistors - a growing problem for chip manufacturers as transistors get ever smaller. Many in the industry have been working for the past several years to find the correct combination (out of hundreds of candidates) of new materials, but Intel is the first to successfully implement such a combination in its 45nm process.

Diagram of Intel's 45nm High-k + metal gate transistor and its associated advantages in performance and leakage reduction.


The Importance of These New Materials
The industry has been using silicon dioxide (SiO2) to build transistor gate dielectrics. Intel's SiO2 gate dielectrics, which have been the thinnest in the industry for the past 14 years, are now only 1.2nm thick (equal to 5 atomic layers) in our 65nm process. However, as the gate dielectric gets thinner, leakage increases. Transistor gate leakage associated with the ever-thinning gate dielectric made of SiO2 has been recognized by the industry as one of the most formidable technical challenges facing Moore's Law in this decade. Intel's solution is to move to alternate materials that are thicker to address leakage, yet at the same time preserve the high capacitance that is desirable for good transistor performance. This class of materials have a property known by the moniker "high-k." High-k, though, is not to be confused with low-k, which is being used to insulate on-chip interconnects. In transistor gate dielectrics, high-k is desirable as it gives high performance with low leakage; in interconnects, low-k is desirable as it leads to faster signal transmission times.

For its 45nm technology, Intel is using a hafnium-based high-k material in the gate dielectric. The high-k dielectric is created using atomic layer deposition (ALD) whereby a single layer of the high-k material molecule is deposited at a time. Because the high-k gate dielectric isn't compatible with today's silicon gate electrode, Intel had to develop the new metal gate materials to solve two fundamental problems that arise when the two are combined. One is known as "threshold voltage pinning" (also called "Fermi level pinning") and the other is "phonon scattering." Neither of these effects is desirable and both cause lower transistor performance. These effects arise when a high-k dielectric is used with a polysilicon gate electrode, but are significantly improved when polysilicon is replaced by specific metals (different ones for NMOS and PMOS transistors), and all are integrated with the right process recipe. (The specific metals are a trade secret.)

The combination of the metal gates and the high-k gate dielectric leads to transistors with very low current leakage and high performance.

Intel will use copper wires with a low-k dielectric for its 45nm interconnects for increased performance and lower power consumption. We will also use innovative design rules and advanced mask techniques to extend the use of 193nm dry lithography because of its cost advantages and high-volume manufacturing capabilities.
Intel's 45nm Manufacturing
Intel's is currently developing its 45nm process on 300mm wafers in Hillsboro, Oregon, in D1D, a fab with clean-room space equivalent to 3.5 football fields. Two new 300mm fabs are being built for the coming 45nm ramp: Fab 32 in Ocotillo, Arizona (production due to start in the second half of 2007) and Fab 28 in Israel (production to start in the first half of 2008).